/* Generated automatically by the program `gencodes'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CODES_H
#define GCC_INSN_CODES_H

enum insn_code {
  CODE_FOR_nothing = 0,
  CODE_FOR_nop = 1,
  CODE_FOR_addsi3 = 2,
  CODE_FOR_mulsi3 = 3,
  CODE_FOR_divsi3 = 4,
  CODE_FOR_udivsi3 = 5,
  CODE_FOR_subsi3 = 6,
  CODE_FOR_addsf3 = 7,
  CODE_FOR_subsf3 = 8,
  CODE_FOR_mulsf3 = 9,
  CODE_FOR_divsf3 = 10,
  CODE_FOR_adddf3 = 11,
  CODE_FOR_subdf3 = 12,
  CODE_FOR_muldf3 = 13,
  CODE_FOR_divdf3 = 14,
  CODE_FOR_floatsisf2 = 15,
  CODE_FOR_floatdidf2 = 16,
  CODE_FOR_fix_truncsfsi2 = 17,
  CODE_FOR_fix_truncdfdi2 = 18,
  CODE_FOR_ashlsi3 = 19,
  CODE_FOR_ashrsi3 = 20,
  CODE_FOR_lshrsi3 = 21,
  CODE_FOR_rotrsi3 = 22,
  CODE_FOR_andsi3 = 23,
  CODE_FOR_xorsi3 = 24,
  CODE_FOR_iorsi3 = 25,
  CODE_FOR_movsi_high = 29,
  CODE_FOR_zero_extendqisi2 = 33,
  CODE_FOR_zero_extendhisi2 = 34,
  CODE_FOR_extendqisi2 = 35,
  CODE_FOR_extendhisi2 = 36,
  CODE_FOR_jump = 78,
  CODE_FOR_indirect_jump = 79,
  CODE_FOR_set_got_tmp = 81,
  CODE_FOR_set_got = 82,
  CODE_FOR_frame_addsi3 = 83,
  CODE_FOR_load_locked_si = 85,
  CODE_FOR_store_conditional_si = 86,
  CODE_FOR_one_cmplsi2 = 91,
  CODE_FOR_movqi = 92,
  CODE_FOR_movhi = 93,
  CODE_FOR_movsi = 94,
  CODE_FOR_movdi = 95,
  CODE_FOR_cstoresi4 = 96,
  CODE_FOR_cstoresf4 = 97,
  CODE_FOR_cstoredf4 = 98,
  CODE_FOR_sne_sr_f = 99,
  CODE_FOR_movqicc = 100,
  CODE_FOR_movhicc = 101,
  CODE_FOR_movsicc = 102,
  CODE_FOR_cbranchsi4 = 103,
  CODE_FOR_cbranchsf4 = 104,
  CODE_FOR_cbranchdf4 = 105,
  CODE_FOR_prologue = 106,
  CODE_FOR_epilogue = 107,
  CODE_FOR_sibcall_epilogue = 108,
  CODE_FOR_simple_return = 109,
  CODE_FOR_eh_return = 110,
  CODE_FOR_mem_thread_fence = 111,
  CODE_FOR_msync = 112,
  CODE_FOR_atomic_compare_and_swapsi = 113,
  CODE_FOR_atomic_compare_and_swapqi = 114,
  CODE_FOR_atomic_compare_and_swaphi = 115,
  CODE_FOR_atomic_exchangesi = 116,
  CODE_FOR_atomic_exchangeqi = 117,
  CODE_FOR_atomic_exchangehi = 118,
  CODE_FOR_atomic_addsi = 119,
  CODE_FOR_atomic_subsi = 120,
  CODE_FOR_atomic_orsi = 121,
  CODE_FOR_atomic_xorsi = 122,
  CODE_FOR_atomic_andsi = 123,
  CODE_FOR_atomic_nandsi = 124,
  CODE_FOR_atomic_addqi = 125,
  CODE_FOR_atomic_subqi = 126,
  CODE_FOR_atomic_orqi = 127,
  CODE_FOR_atomic_xorqi = 128,
  CODE_FOR_atomic_andqi = 129,
  CODE_FOR_atomic_nandqi = 130,
  CODE_FOR_atomic_addhi = 131,
  CODE_FOR_atomic_subhi = 132,
  CODE_FOR_atomic_orhi = 133,
  CODE_FOR_atomic_xorhi = 134,
  CODE_FOR_atomic_andhi = 135,
  CODE_FOR_atomic_nandhi = 136,
  CODE_FOR_atomic_fetch_addsi = 137,
  CODE_FOR_atomic_fetch_subsi = 138,
  CODE_FOR_atomic_fetch_orsi = 139,
  CODE_FOR_atomic_fetch_xorsi = 140,
  CODE_FOR_atomic_fetch_andsi = 141,
  CODE_FOR_atomic_fetch_nandsi = 142,
  CODE_FOR_atomic_fetch_addqi = 143,
  CODE_FOR_atomic_fetch_subqi = 144,
  CODE_FOR_atomic_fetch_orqi = 145,
  CODE_FOR_atomic_fetch_xorqi = 146,
  CODE_FOR_atomic_fetch_andqi = 147,
  CODE_FOR_atomic_fetch_nandqi = 148,
  CODE_FOR_atomic_fetch_addhi = 149,
  CODE_FOR_atomic_fetch_subhi = 150,
  CODE_FOR_atomic_fetch_orhi = 151,
  CODE_FOR_atomic_fetch_xorhi = 152,
  CODE_FOR_atomic_fetch_andhi = 153,
  CODE_FOR_atomic_fetch_nandhi = 154,
  CODE_FOR_atomic_add_fetchsi = 155,
  CODE_FOR_atomic_sub_fetchsi = 156,
  CODE_FOR_atomic_or_fetchsi = 157,
  CODE_FOR_atomic_xor_fetchsi = 158,
  CODE_FOR_atomic_and_fetchsi = 159,
  CODE_FOR_atomic_nand_fetchsi = 160,
  CODE_FOR_atomic_add_fetchqi = 161,
  CODE_FOR_atomic_sub_fetchqi = 162,
  CODE_FOR_atomic_or_fetchqi = 163,
  CODE_FOR_atomic_xor_fetchqi = 164,
  CODE_FOR_atomic_and_fetchqi = 165,
  CODE_FOR_atomic_nand_fetchqi = 166,
  CODE_FOR_atomic_add_fetchhi = 167,
  CODE_FOR_atomic_sub_fetchhi = 168,
  CODE_FOR_atomic_or_fetchhi = 169,
  CODE_FOR_atomic_xor_fetchhi = 170,
  CODE_FOR_atomic_and_fetchhi = 171,
  CODE_FOR_atomic_nand_fetchhi = 172,
  CODE_FOR_call = 173,
  CODE_FOR_sibcall = 174,
  CODE_FOR_call_value = 175,
  CODE_FOR_sibcall_value = 176
};

const unsigned int NUM_INSN_CODES = 177;
#endif /* GCC_INSN_CODES_H */
